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rom P r o d u c t IIn n o vva t i o n FF r o m n MP103 n o a
MP103 MP103
GENERAL DESCRIPTION
Power Operational Amplifiers
FEATURES
Low Cost Integrated Solution Output Current >10A Within SOA Internal Power Dissipation 35 W Per Channel 167V/S Slew Rate
The MP103 is a high voltage, high output current dual channel operational amplifier for driving capacitive loads such as piezo devices use in ink jet printing applications. The MP103 utilizes proprietary IC's combined with discrete semiconductor and passive elements on a thermally conductive insulated metal substrate, delivering very high power from a compact module. The amplifier gain is fixed at 65 V/V when the feedback pin is connected to the VOUT pin. Internal compensation provides optimum slew rate and insures stability. The only external components required are the current limit resistors RLIM, a series isolation resistor RS and the power supply bypass capacitors.
APPLICATIONS
Piezoelectric Actuation For Ink Jet Printer Nozzles
EQUIVALENT CIRCUIT DIAGRAM
Feedback A +Vs +Vs +Vs +Vaux IN_A IL IL IL Out A
-Vs -Vs -Vs GND +Vs +Vs +Vs
-5V
Feedback B
IL IL IN_B IL Out B
-Vs -Vs -Vs
MP103U
http://www.cirrus.com
Copyright (c) Cirrus Logic, Inc. 2009 (All Rights Reserved)
SEP 2009 1 APEX - MP103UREVA
MP103
P r o d u c t I n n o v a t i o nF r o m
CHARACTERISTICS AND SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS
Parameter
SUPPLY VOLTAGE, +VS to -VS SUPPLY VOLTAGE, -VS SUPPLY VOLTAGE, +VAUX OUTPUT CURRENT, pk, per Channel (Within SOA) POWER DISSIPATION, internal, Each Channel INPUT VOLTAGE TEMPERATURE, pin solder, 10s TEMPERATURE, junction TEMPERATURE RANGE, storage (Note 2) TJ TS -40
Symbol
+VS to -VS -VS +VAUX IO(PK) PD VIN
Min
-30
Max
200 30 15 35
Units
V V V A W V C C C
-5
VAUX 225 150 105
SPECIFICATIONS
Parameter
INPUT (Each Channel) OFFSET VOLTAGE OFFSET VOLTAGE vs. temperature BIAS CURRENT, initial INPUT RESISTANCE, DC INPUT CAPACITANCE INPUT VOLTAGE RANGE NOISE GAIN (Each Channel) FIXED GAIN GAIN BANDWIDTH, -3db POWER BANDWIDTH, 130VP-P OUTPUT (Each Channel) VOLTAGE SWING VOLTAGE SWING CURRENT, Peak, Source SLEW RATE POWER SUPPLY VOLTAGE, -VS VOLTAGE, +VAUX VOLTAGE, +VS CURRENT, quiescent, -VS CURRENT, quiescent, +VAUX CURRENT, quiescent, +VS -VS + 20 (Note 4) -7 -15 24 145 19 13.5 1 -20 25 -VS + 200 26 15 5 V V V mA mA mA RS=1.0, CL=47nF, VIN 8VP-P 167 IO = 10A IO = -5A +VS - 15 -VS + 15 +VS - 9 -VS + 14 12 V V A V/S Feedback connected to VOUT CL = 47nF +VS = 145V, -VS = -15V 63.5 65 230 230 66.5 V/V KHz KHz f = 10KHz -3.4 600 (Note 3) Full temperature range -6.6 -6.7 2 2 3.3 300 1.5 +VAUX - 2 6.6 6.7 mV V/C A K pF V nV/Hz
Test Conditions
Min
Typ
Max
Units
2
MP103U
P r o d u c t I n n o v a t i o nF r o m
MP103
Test Conditions Min Typ
1.5 3.1 12.5 0
Parameter
THERMAL
Max
1.75 3.6 14 70
Units
C/W C/W C/W C
RESISTANCE, AC, junction to case (Note 5) Full temperature range, f 60Hz RESISTANCE, DC, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case Full temperature range, f < 60Hz Full temperature range
NOTES:
1. (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and TC = 25C). 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. 3. Doubles for every 10C of case temperature increase. 4. +VS and -VS denote the positive and negative supply voltages to the output stages. +VAUX denotes the positive supply voltage to the input stages. 5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
VOLTAGE DROP FROM SUPPLY (V)
OUTPUT CURRENT FROM +VS OR -VS (A)
INTERNAL POWER DISSIPATION PER CHANNEL, PD (W)
40 35 30 25 20 15 10 5 0 0
POWER DERATING
EACH CHANNEL
SOA
10 SOURCE DC 1mS 10mS
16 14 12 10 8 6 4 2 0
OUTPUT VOLTAGE SWING
SINK SOURCE
SINK DC
40 GAIN, A V (DB) 30 20 10 0 -10
LEFT SCALE
0 -30 -60
PHASE, () NORMALIZED QUIESCENT CURRENT, IQ (X)
50
30
1.1
NORMALIZED BIAS CURRENT, IB (X)
FREQUENCY RESPONSE
25 50 75 100 CASE TEMPERATURE, TC (C)
1 1 10 100 SUPPLY TO OUTPUT DIFFERENTIAL, VS - VO (V)
0
QUIESCENT CURRENT
+VS
OFFSET VOLTAGE vs. TEMPERATURE
1.2 1.1 1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 CASE TEMPERATURE, TC (C)
2.5 5 7.5 OUTPUT CURRENT, IO (A)
10
1.08 1.06 1.04 1.02 1
RIGHT SCALE
-90
-120 -150 -180 1M
VAUX -VS 0 25 50 75 CASE TEMPERATURE, TC (C) TC = 25C TC = 70C
-20 1K
CLOAD = 50nF 100K 10K FREQUENCY, F (Hz)
0.98 0.96 -25
DC OUTPUT VOLTAGE, VO (Vdc)
MAXIMUM DUTY CYCLE, DC (%)
150 140 130 120 110 100
100
NORMALIZED BIAS CURRENT, IB (X)
MAX. DC OUTPUT VOLTAGE
MAX. OUTPUT PULSE DUTY CYCLE
INPUT BIAS CURRENT vs. TEMPERATURE
1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 CASE TEMPERATURE, T (C)
MP103U
0 25 50 75 CASE TEMPERATURE, TC (C)
3
10 100
120 140 160 180 OUTPUT VOLTAGE, V (V)
PHASE, () NORMALIZED QUIESCENT CUR
NORMALIZED BIAS CURR
GAIN, A V (DB)
30 20 10 0 RIGHT SCALE
-30 -60 -90
1.06 1.04 1.02 1 0.98 0.96 -25 VAUX -VS
1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 CASE TEMPERATURE, TC (C)
-120 -150 -180 1M
-10 MP103 C -20 1K
LOAD
= 50nF
P r o d u c t I n n o v a t i o nF r o m
0 25 50 75 CASE TEMPERATURE, TC (C) TC = 25C TC = 70C
100K 10K FREQUENCY, F (Hz)
DC OUTPUT VOLTAGE, VO (Vdc)
MAXIMUM DUTY CYCLE, DC (%)
150 140 130 120 110 100
100
NORMALIZED BIAS CURRENT, IB (X)
MAX. DC OUTPUT VOLTAGE
MAX. OUTPUT PULSE DUTY CYCLE
INPUT BIAS CURRENT vs. TEMPERATURE
1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 CASE TEMPERATURE, TC (C)
0
NORMALIZED OFSET VOLTAGE, VOS (X)
NORMALIZED OFSET VOLTAGE, VCS (X)
1.030 1.025 1.020 1.015 1.010 1.005 1.000 0.995 5 30 55 80 105 130 155 180 205 TOTAL SUPPLY VOLTAGE, VSS (V)
NORMALIZED BIAS CURRENT, IB (X)
1.035
OFFSET VOLTAGE vs. VS SUPPLY
25 50 75 CASE TEMPERATURE, TC (C)
10 100
1.2 1.0 0.8 0.6 0.4 0.2
OFFSET VOLTAGE vs. VAUX SUPPLY
120 140 160 180 OUTPUT VOLTAGE, VO (V)
INPUT BIAS CURRENT vs. VAUX SUPPLY
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 5 10 15 20 25 TOTAL SUPPLY VOLTAGE, VAUX (V)
0 5 10 15 20 25 TOTAL SUPPLY VOLTAGE, VAUX (V)
NORMALIZED BIAS CURRENT, IB (X)
INPUT BIAS CURRENT vs. VSS SUPPLY
1.2 1.0 0.8 0.6 0.4 0.2 0 5 30 55 80 105 130 155 180 205 TOTAL SUPPLY VOLTAGE, VSS (V) AMPLIFIER GAIN, AV (V/V)
105 100 95 90 85 80 75 70
AMPLIFIER GAIN vs. RFDBK
SLEW RATE, SLR (V/s)
450 400 350 300 250 200
SLEW RATE vs. TEMPERATURE
+SLR
-SLR
65 0 500 1000 1500 EXTERNAL FEEDBACK RESISTOR, RFDBK ()
150 -40 -20 0 20 40 60 80 CASE TEMPERATURE, TC (C)
EXTERNAL CONNECTIONS
42-Pin DIP Package Style FC
4 MP103U
P r o d u c t I n n o v a t i o nF r o m
MP103
PIN DESCRIPTIONS
Pin # Pin name
1,2,3 4,5,6 8 15 18,19,20 21,22,23 24,25,26 28 30 32 34 36 38 40,41,42 +VS _A IL _A Out_A Out_B +VS _B -VS _B IL _B IN_B Feedback_B GND +VAUX Feedback_A IN_A -VS _A
Description
Positive high voltage power supply pins for channel A. High current output pins for channel A. A current limit resistor must be placed between these pins and the output pin 8. Output pin for channel A. Output pin for channel B. Positive high voltage power supply pins for channel B. Negative power supply pins for channel B. High current output pins for channel B. A current limit resistor must be placed between these pins and the output pin 15. Input pin for channel B. Feed back pin for channel B. This pin must be connected to output B pin 15 to close the feedback loop. When connected directly to pin 15 the closed loop voltage gain of channel B is 65 V/V. The gain can be increased by inserting a 1/4 W resistor between pins 30 and 15. Ground +24V voltage power supply pin. A 24 V power supply is required for operation of front end small signal circuitry of each channel. Feed back pin for channel A. This pin must be connected to output A pin 8 to close the feedback loop. When connected directly to pin 8 the closed loop voltage gain of channel A is 65 V/V. The gain can be increased by inserting a 1/4 W resistor between pins 36 and 8. Input pin for channel A. Negative power supply pins for channel A.
GENERAL
Please read Application Note 1 "General Operating Considerations" which covers stability, power supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.Cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, Apex Precision Power's complete Application Notes library, Technical Seminar Workbook and Evaluation Kits.
AMPLIFIER GAIN
When the feedback pin for each channel is connected to the corresponding OUT pin, the gain of the amplifier is internally set to 65 V/V. The amplifier gain can be increased by connecting a resistor between the feedback and Out pin. The amplifier gain will be increased approximately 1 V/V for each additional 49.9 added between the feedback and OUT pin.
SAFE OPERATING AREA
The MOSFET output stage of the MP103 is not limited by second breakdown considerations as in bipolar output stages. Only thermal considerations and current handling capabilities limit the SOA (see Safe Operating Area graph). The output stage is protected against transient flyback by the parasitic body diodes of the output stage MOSFET structure. However, for protection against sustained high energy flyback external fast-recovery diodes must be used.
POWER SUPPLY BYPASSING
Bypass capacitors to power supply terminals +VS and -VS must be connected physically close to the pins to prevent local parasitic oscillation in the output stage of the MP103. Use electrolytic capacitors at least 10F per output amp required. Bypass the electrolytic capacitors with high quality ceramic capacitors (X7R) 0.1F or greater. Duplicate the supply bypass for the supply terminals of each amplifier channel. A bypass capacitor of 0.1F or greater is recommended for the +VAUX terminal.
MP103U
5
MP103
CURRENT LIMIT
P r o d u c t I n n o v a t i o nF r o m
For proper operation, the current limit resistor (RLIM) must be connected as shown in the external connection diagram. For optimum reliability the resistor value should be set as high as possible. The value is calculated as follows; with the maximum practical value of 30. The current limit function can be disabled by shorting the IL pin to the OUT pin. RLIM = 0.7/ILIM
POWER SUPPLY PROTECTION
Unidirectional zener diode transient suppressors are recommended as protection on the supply pins. The zeners clamp transients to voltages within the power supply rating and also clamp power supply reversals to ground. Whether the zeners are used or not, the system power supply should be evaluated for transient performance including power-on overshoot and power-off polarity reversal as well as line regulation. Conditions which can cause open circuits or polarity reversals on either power supply rail should be avoided or protected against. Reversals or opens on the negative supply rail is known to induce input stage failure. Unidirectional transzorbs prevent this, and it is desirable that they be both electrically and physically as close to the amplifier as possible.
SERIES ISOLATION RESISTOR, RS
To insure stability with all capacitive loads a series isolation resistor should be included between the output and the load as shown in the external connections drawing. A 1 resistor works well for capacitive loads between 135pF and 44nF. The resistor will affect the rise and fall time of the output pulse at the capacitive load. This can be compensated for on the input signal.
BACKPLATE GROUNDING
The substrate of the MP103 is an insulated metal substrate. It is required that it be connected to signal ground. This is accomplished when the ground pin (Pin 32) is properly connected signal ground.
CONTACTING CIRRUS LOGIC SUPPORT
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@cirrus.com. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
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MP103U

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